The present invention relates to reliability analysis of an integrated circuit design, and more specifically, to methods and systems that efficiently compute the root mean square (RMS) currents on the VLSI circuit wires and checks whether current limits are exceeded.
Increasing power densities and shrinking interconnects within integrated circuit designs results in increasing current density demands. This increases the concerns for local heating and local temperature gradients which have significant impact on the reliability of very large scale integration (VLSI) circuits, in particular electro-migration. Joule heating that results in temperature gradients in the conductor is more effective in reducing lifetime than the increase in temperature alone would suggest.
Reliability of integrated circuit designs are usually evaluated with a simulator, such as SPICE (Simulation Program with Integrated Circuit Emphasis) which is a general-purpose open source analog electronic circuit simulator that is used in integrated circuit and board-level design to check the integrity of circuit designs and to predict circuit behavior.